The perfect storm for silicon photonics

The insatiable appetite for bandwidth has been driving advancements in datacentre switches, which are expected to double in capacity every two to three years.

While 12.8Tbps switches deployed with 100Gbps optical modules are commonplace in web-scale datacentres, their capacities are expected to hit 25Tbps in the next two years before topping out at 50Tbps in another five to six years.

At that point, the switches that convert optical signals into electronic signals – and vice versa – will reach an inflection point where the bandwidth density can no longer be supported using conventional interconnect technology.

That’s where silicon photonics come in. By packaging optical modules into switches, silicon photonics, which uses silicon chips to transmit optical signals, such limitations can be overcome, paving the way for 400Gbps and beyond optical links.

“This is the perfect storm for silicon photonics,” said Joris Van Campenhout, chief technologist for silicon photonics at Imec, a Belgium-based research and development outfit that has been developing silicon photonics platforms on 200mm and 300mm wafers, in combination with high-speed electronics.

“Density scaling is something we can do rather well with silicon photonics. Also, we can keep track of the yield because there’s no need to build many more components on a given chip.

“There are also additional features that a silicon-based solution can offer in terms of web-scale testing, and the use of advanced 3D packaging to put optical and electrical components together,” Campenhout added.

With much of the world’s silicon wafer fabrication infrastructure already in place, silicon photonics is poised for wafer-scale production, even as challenges that can stand in the way of wider adoption are being overcome.

For one, the laser devices that produce the infrared beams to transmit data consume a lot of power to make up for transmission losses.

“The more losses you have, the more power the laser needs to generate to get the job done,” Campenhout said. “So, we try to reduce the losses across the full optical link, going from active components to the high-speed modulators, to the fibre optic structures between the fibre and electronics chip.”

Another way to reduce the thermal footprint of silicon photonics is to bring the optics into the host integrated circuit (IC) where data is received and processed, alleviating the need for an electrical link that connects the optical module to the IC. Imec is also looking at thermal modelling and the use of other cooling systems beyond air cooling.

Notwithstanding these challenges, silicon photonics is already a commercial reality. Campenhout reckons between two and three million transceiver and receiver systems are being shipped each year.

“For the optics industry, it’s starting to become significant,” Campenhout said, “but for the CMOS industry, it’s still a drop in the ocean.”

As with any emerging technology, having a critical mass of silicon photonics users and applications will drive down production costs.

Campenhout sees the technology extending its reach beyond datacentres – for example in “supercomputers in a box” that use graphics processing units to run bandwidth-intensive artificial intelligence applications.

“Today, that’s all done with electrical interconnects,” Campenhout said. “But a few generations into the future, you can expect the inflection point where the optics will be at the board level itself.”

Until then, there is another hurdle to cross. Although standards exist for optical modules, there are diverse differences in the way silicon photonics is implemented.

Campenhout reckons a reference design would help to at least standardise the interface specifications, as well as the way optics are being packaged with silicon chips.

“That would help to bring some focus in the industry towards reducing the number of implementation options, and to drive up the volume for a given implementation so that everybody can benefit from lower costs,” he said.